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READ_ME
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1990-07-15
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This READ_ME file is the third major release of 'make'. A discussion of
its history is contained below.
========================== Caveats =================================
CAVEATS for 'make' by RAL (23.8.89)
a) undefined macros will expand to a null string !
b) $<,$* are only defined for implicit rules !
If you use them within an explicit rule they will be not defined and will
according to a) expand to a null string without an error message.
This is due to the original definition and the fact that they cannot be
defined in a unique way for explicit rules:
"$< is the name of the related file that caused the action" [1]
within explicit rules there may be several dependencies; and within
foo.o : foo.c foo.h
commandline
foo.h may be the file that causes the action where you may expect
$< set to foo.c .
"$* is the prefix shared by the current and the dependent file names"
within explicit rules there may be several dependencies with no common
prefix like in the following example:
foo.o : foo.c include.h
commandline
c) Which implicit rules is applied ? According to Feldman [1] :
"If there are two paths connecting a pair of suffixes, the longer one is
used only if the intermediate file exists or is named in the description"
With the consequence that:
- if you want .l.c .c.o to be applied on a source foo.l either foo.c must
exist already or you must add
foo.c :
to your makefile
- if you want foo.o to be made out of foo.l you must either define
several implicit rules and name the files explicitly like in the
example above, or define an additional implicit rule .l.o
d) Feldman [1] forgot to define how implicit rules should be applied on a
target with a given list of dependencies but no explicit command line.
Besides the problems mentioned in b) an additional problem occurs:
Given the makefile:
foo.o : foo.c
and .SUFFIXES : .s .c and implicit rules .s.o, .c.o
and existing files foo.c,foo.s
it's not defined which rule should be applied. With the standard algorithem
.s.o would be selected, what's a little bit strange.
Therefore I did implement the following definitions:
Implicit rules will be choosen according to the sequence of the .SUFFIXES
dependencies. But if explicit dependencies exist for the target implicit
rules connecting the target with an explicit dependency will be choosen.
"$< is the name of the related file (dependency) that is generated by
substituting the suffix of the target file by the one given in
the implicit rule"
"$* is the prefix shared by the target name and $<"
This should result in what everyone aspects make to do.
[1] S.I. Feldman : Make - A Program for Maintaing Computer Programs
========================== Readme1 =================================
Following is a repost of the public domain 'make' that I posted
to net.sources a couple of months ago. I have fixed a few bugs, and
added some more features, and the resulting changes amounted to
about as much text as the whole program (hence the repost).
For those that missed the net.sources posting, this is a public domain
re-implementation of the UNIX make program. There is no manual included;
for documentation, refer to a UNIX manual, or the source.
Here is a list of the changes made:
i) If '-' (ignore) or '@' (silent) where used at the start
of a command, their effect was not turned off for the following
commands.
ii) A special target (.SUFFIXES, .PRECIOUS) or a rule (.c.o, .a.o),
if first in the file would be taken as the default target.
This resulted in error messages like "Don't know how to
make .c", because things like .SUFFIXES were being made.
This was further complicated by ---
iii) Special target lines with no dependents (ie. .SUFFIXES:\n)
were not clearing out the existing dependents like
they should.
iv) Default rules could not be redefined because of the error
checking for commands being defined twice. Now you are
allowed to define a target beinging with '.', having
no dependents with commands.
v) The -q option didn't do the time comparison correctly,
or clear the variable used to keep track of this. Thus
it didn't work very well.
vi) The syntax ${..} for macro's supported by UNIX make was
not supported.
vii) There wuz a couple of spelling errors.
viii) When make checked for implicit rules on targets without
a suffix, there were problems. (Note: The ~ feature of
UNIX make wasn't and still isn't supported)
ix) The -n option did not print @ lines like it was supposed to.
x) :: added. (See UNIX manual)
xi) $? added. (see UNIX manual)
========================== Readme2 =================================
Problems fixed:
- various calls of functions with incorrect arguments (0 instead of NULL
pointers) in rules.c [2] (In [1] = [3] there are still some casts
missing)
- passing of a NULL pointer to strcmp in main.c, which the ST didn't like
at all [1] ([2] complex bug fix; [3] is missing this bug fix !!)
- implicit rules didn't work if an explicit rule was given for the
dependency file but no old version of the dependency file existed.
Example:
makefile:
# make bug1 --- scan.c,scan2.c must not exist !!
flex : scan.o scan2.o
cc scan.o scan2.o -o flex
scan.o : scan.c
scan.c : scan.l
flex -ist scan.l > scan.c
scan2.c : scan.l
flex -ist scan.l > scan2.c
output:
flex -ist scan.l > scan.c
make: Don't know how to make scan2.o
Even though the implicit rule .c.o exists make ignores the explicit
rule for scan2.c and even with an empty explicit rule for scan.o
make forgets to compile the generated scan.c !
Both errors are caused by the same bug which I have fixed in rules.c
with inserting the "op->n_line" stuff.
- "$*" macros within recursive implicit rules have been expanded to
wrong values
makefile:
# make bug2 (recursive implicit rules with $* )
.c.o :
cc -c $*.c
flex : nfa.o sym.o
cc nfa.o sym.o -o flex
nfa.c : sym.o
mv nfa.c2 nfa.c
output:
cc -c sym.c
mv nfa.c2 nfa.c
cc -c sym.c
cc nfa.o sym.o -o flex
Within the second compile command $* gets expanded again to "sym"
instead of "nfa" ! (This example looks artificial -- there is a
more realistic one below)
The $* macro had been set before the dependency files had been made,
which could redefine the macro again. I fixed the bug in rules.c and
make.c (baseline stuff)
- "$<" macros within recursive implicit rules have been expanded to
wrong values
makefile
# make bug3 (recursive implicit rules with $< )
.c.o :
cc -c $<
flex : nfa.o sym.o
cc nfa.o sym.o -o flex
nfa.c : sym.o
mv nfa.c2 nfa.c
output:
cc -c sym.c
mv nfa.c2 nfa.c
cc -c sym.c
cc nfa.o sym.o -o flex
Within the second compile command $< gets expanded again to "sym"
instead of "nfa" ! (This example looks artificial -- there is a
more realistic one below)
The $< macro had been set before the dependency files had been made,
which could redefine the macro again. I fixed the bug in rules.c and
make.c (inputline stuff)
More realistic makefile to demonstrate the $* and $< bugs:
makefile:
# parse.y, scan.c should exist, scan.o depends on parse.h (y.tab.h)
# which will be generated together with parse.c
flex : scan.o
cc scan.o -o flex
scan.o : parse.c
output:
yacc parse.y
mv y.tab.c parse.c
cc -O -c parse.y
cc scan.o -o flex
I fear our compiler doesn't know how to